
Intel Shows Off Several Next-Generation Microprocessor Based Systems at IDF.
Category: CPU and Chipset Date: April 5th, 2008Intel Corp. demonstrated computers running forthcoming microprocessors based on the Nehalem micro-architecture at Intel Developer Forum in Shanghai, China. This is the first public demonstration of the new central processing units that is supposed to clearly indicate that Intel is on track to start shipments of new chips towards the end of the year.
The first public demonstration of Intel’s quad-core Nehalem/Bloomfield processor revealed that the chip can work stably at 3.20GHz, which is not a low speed for Intel’s current-generation Intel Core 2 Quad central processing units. Intel did not reveal thermal design power of the demonstrated chips and also did not unveil any benchmark numbers.
In fact, 3.20GHz is a very high clock-speed for such highly-integrated chip as Nehalem: the quad-core chip consists of one monolith die (whereas Core 2 Quad consists of two dice); has three-level cache hierarchy: 64KB L1 (32KB for data, 32KB for instructions), 256KB L2 cache per core, 8MB L3 cache per processor (whereas Core 2 Quad only sports 6MB of L2 cache per die); is equipped with built-in triple-channel DDR3 memory controller and also features simultaneous multi-threading technology, which allows the chip to execute two threads per core.
Nehalem will first be seen in high-end desktop processors and dual processor server systems, and expand to other market segments in 2009, Intel said officially.
Source: X-bit labs